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CatalyteIC is currently developing the following training modules. These courses will be available in Q2, 2011.
- A1. AMS (Analog‐Mixed Signal) Design
- Advanced Power Managements in Mixed‐Signal SOCs
- Introduction to Verilog‐A
- Introduction to Analog Verification
- PLL Design Fundamentals
- A2. Physical Design (Implementation, Verification, Analysis)
- Physical Design Implementations‐ RTL to GDS
- Physical Design Implementations‐ netList to GDS
- Physical Verification‐ Efficient Debugging
- Parasitic Extraction‐ Tips and Tricks
- Analog Layout Techniques
- A3. EDA/ Design Flow/Methodology
- Introduction to EDA
- AMS (Analog‐ Mixed Signal) Design Flow
- Scripting for Analog Designers
- A4. Reliability, Quality and Test
- RF and Mixed‐Signal Testing
- Design for Reliability
- Failure and Yield Analysis
- A5. Packaging
- IC Packaging Design and Modeling
- A6. Special Topics
- PDK Demystified
- SRAM Design‐ Fundamentals to Advanced Techniques
- Everything about clocking‐ Generation, Distribution, Methodology
- Fundamentals of DFM (Design for Manufacturing)
If you are interested about any of the upcoming courses, please send an email to-
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